How do you make a circuit that compares two 2-bit numbers?

What would be the schematics for a circuit that compares two 2-bit numbers where G means that the first number is larger than the second number, L means that the first number is less than the second number, and E means that the two numbers are equal??? Please help. Thanks.How do you make a circuit that compares two 2-bit numbers?
Since it is only 16 options, you can just use a logic circuit. If it were more it would be best to convert each bit to analog with a summing op-amp circuit and have each bit input resistor double the last value. Then the two values could be fed into a comparator. A special logic circuit would need to be added for the equal [same as below] which would then logically override the comparator output for a 1 or 0 meaning L or G.


[it would do this by making the outputs:


G = comparator_output and not E


L = not comparator_output and not e]





To make the logic circuit you will need a bunch of logic gates. You can do everything with a slew of two input nor gates, or you can get some ands, ors, xors, and inverters of as many as 4 inputs each. That is up to you.





To figure out how to hook them up you need to draw a grid that is 4x4, down the side label it with the first number AB possible values:00,01,10,11 across the top label it with the second number CD possible values:00,01,10,11.





Now in the grid fill in what output you want, presumably you will have three outputs, E,L, and G. E would be diagnal from top left to bottom right. The six above and right are Gs, and the six below and left are Ls.





Like this except straight and with lines:


AB CD:00,01,10,11


00 E G G G


01 L E G G


10 L L E G


11 L L L E





now take each area that you can can and work it into the logic equation. For example the Es are two xor gates ANDed together.


E = ((a xor c) and (b xor d)) [this is kind of by definition of equals there was no real trick here]





then you can see the top-right four Gs can easily be singled out with:


G(1)=(c and (not a)) [that is c is 1 and a is 0]





now you can do the same for the Ls on the bottom left:


L(1)=(a and (not c))





Now you can pick up the straglers one at a time or as a group. for example the AB/CD=11/10 is an L, and so is the entire bottom row where ab=11 except for the E which is already known. so you could do this:





L(2)=(a and b and c and (not d)) [to pick it up alone]


or


L(2)=(a and b and (not e)) [which gets some other Ls you already got which is fine since you are going to and all the Ls together later to get the final L]





now you need L(3) and then pick up G(2) and G(3) the same way. After that the final step is to or them all together:





L= L(1) or L(2) or L(3) [same for Gs]





Now you can take the rules for modifying and simplifying the gates down to only 2-input nors if you want, or you can keep all the various gates and hook them all up.





If you really want to get fancy then you can send the output to an alphanumeric LED and actually print the letter, but that is a whole nother task.





Each segment would then be either always on, always off, or some logical combination of the three outputs G and E [since the L segments would always be on]How do you make a circuit that compares two 2-bit numbers?
bad karma Report Abuse

It's impossible to draw or give details of a schematic, but I can tell you the principles.


If the most significant bits (MSBs) of the two numbers differ, the MSB that=1 is from the larger number. If they don't differ then the test is repeated for the least significant bits (LSBs) of the two numbers. If they don't differ the numbers are equal.


For these comparisons we use the exclusive-OR (XOR) gate, whose output is high if the inputs differ, otherwise low; the NAND gate, whose output is low if both inputs are high, otherwise high; the NOR gate, whose output is low if either input is high, otherwise high; and the inverter, which changes low to high or high to low.


Feed the MSBs of each number to an XOR, and feed the XOR output to one input of each of two NANDs. Connect number 1's MSB to the other input of one NAND, and number 2's MSB to the other input of the second NAND. If either NAND's output is low that number is the larger. If both NANDs are high the MSBs are equal. The NANDs cannot both have a low output.


Now create the identical circuit but substituting the two LSBs for the MSBs. Now there are four outputs, where a low state indicates: MSB1 larger, MSB2 larger, LSB1 larger, LSB2 larger. We must connect them so as to yield one of the three possible results.


When is number 1 larger? When MSB1 is larger, or both MSBs are equal and LSB1 is larger. We can implement that by connecting the MSB's XOR output through an inverter to one input of a NAND gate and the 'LSB1 larger' signal to the other, and then feeding the output of the NAND and the 'MSB1 larger' signal to a NOR gate. Follow the flow. The inverted XOR output is high when both MSBs are the same. The NAND output is low if both MSBs are the same and LSB1 is larger. The NOR output is high if those conditions are true or MSB1 is larger, which is what we wanted. So we have the G (Number 1 larger) output, high when true.


Now we build the identical circuit for MSB2 and LSB2 (but using the same inverted XOR output) to obtain the L (Number 1 smaller) output. What remains is the E (both numbers equal) output, easily obtained by feeding G and L into a NOR gate. The NOR output, or E, is true only when both inputs are low (false).


EDIT:


Brian, I like your succinct truth-table approach. Mine is more elementary, on the assumption of no familiarity with gate behavior. But I think the Gs and Ls in your table need to be swapped. Also I believe the correct expression for E would be NOT((a xor c) or (b xor d)) rather than ((a xor c) and (b xor d)).